UV硬化時の漏洩限界におけるX軸およびY軸コンデンサの選定

UV硬化時の漏洩限界におけるX軸およびY軸コンデンサの選定

抽象

UV curing equipment runs mains stages at 230–480 VAC and high-voltage stages at 5–20 kVDC with ignition pulses to 30 kV, so leakage current and insulation coordination decide whether the machine may be sold. This article sets out the touch-current sum, the stray-capacitance term, the X and Y class rules and the fail-open requirement, then gives six steps that pass certification once and stay passed.

はじめに

A UV curing machine holds two voltage domains at once. The mains stage runs at 230–480 VAC, and the lamp stage runs at 5–20 kVDC with ignition pulses reaching 30 kV.

The safety architecture around those domains comes from a family of standards. IEC 60664-1 sets insulation coordination with creepage and clearance. IEC 60990 defines how touch current is measured.

The capacitor carries two safety roles. Y capacitors tie the input filter to earth, and the high-voltage capacitors must never fail in a way that reaches the operator.

This article covers the leakage sum, the stray term, the class rules for X and Y parts, four field pain points, and six design steps that keep the machine inside its certified envelope.

2. コアメカニズム

2.1 The touch-current sum

Touch current is the current that reaches earth through the protective conductor and the operator. Each Y capacitor contributes in proportion to its reactance at the line frequency:

I_Y = 2π × f × C_Y × V_LN

where I_Y is the current through one Y capacitor, f the line frequency, C_Y its capacitance, and V_LN the line-to-neutral voltage driving the line-to-earth path.

The total adds every Y capacitor and every parasitic path:

I_touch = ∑ I_Y + I_stray

where I_touch is the measured touch current, ∑ I_Y the sum over all Y capacitors, and I_stray the current through parasitic capacitances from any node to earth.

At 230 V and 50 Hz one nano-farad carries 72 µA. At 60 Hz the same part carries 87 µA, which tightens every downstream number.

2.2 Allowance arithmetic and the maximum Y value

The design allowance sits below the limit, so that aging and component spread stay inside it:

I_allow = 0.7 × I_limit

where I_allow is the design allowance and I_limit the applicable limit: 250 µA for portable equipment and 3.5 mA for fixed equipment under IEC 60990.

Rearranging the two equations gives the largest total Y capacitance the layout may carry:

C_Y_max = (I_allow − I_stray) / (2π × f × V_LN)

where C_Y_max is the total Y capacitance, I_allow the design allowance, and I_stray the stray-current term.

With a 175 µA allowance and 14 µA of stray, C_Y_max is 2.23 nF at 50 Hz and 1.86 nF at 60 Hz. Two 1 nF parts fit at 50 Hz; a third does not.

2.3 Stray capacitance and the switching edge

Parasitic capacitance from a switching node to earth spends the same allowance as a Y capacitor. At the switching edge it also carries displacement current:

I_stray = C_stray × dV/dt

where I_stray is the displacement current, C_stray the node-to-earth parasitic capacitance, and dV/dt the slew rate of the bus voltage.

A 400 V bus switched in 200 ns has a slew rate of 2 V/ns. With 200 pF of parasitic capacitance the edge drives 0.4 A of peak current, which the common-mode choke and the shielding must return.

At 50 Hz that same 200 pF adds 14 µA to the touch-current sum, which is what a 0.2 nF Y capacitor contributes.

2.4 Insulation coordination and the fail-open rule

Clearance and creepage come from the peak voltage, not the rms value:

V_peak = √2 × V_rms

where V_peak is the peak working voltage used for insulation coordination and V_rms the nominal mains voltage. A 230 V line presents 325 V peak, and the transient rating adds the impulse class on top.

Y1 parts carry a peak impulse rating of 8 kV and a working voltage to 250 VAC. Y2 parts are rated at 5 kV impulse for lower-risk positions. X parts sit between the phases and are rated for the transient that appears there.

The construction rule is absolute: the failure mode must be open circuit. Partial discharge below 5 pC at 1.2× rated voltage is part of that guarantee, because a part that erodes into an unexpected short defeats the fuse it sits behind.

Fig. 1 — A 250 µA touch-current limit leaves 92 µA of headroom once two 1 nF Y capacitors and 200 pF of bus stray are counted, and the 70% allowance line still clears them.

3. エンジニアリング上の課題

Pain Point 1: The EMI and leakage deadlock

The machine fails its conducted-emissions test, so the filter gains Y capacitance. Emissions pass, and the touch-current measurement now fails because the sum exceeds 250 µA.

The redesign cycle costs weeks. The resolution is to raise the common-mode choke first and shield the switching node, so that suppression is bought without spending the leakage allowance.

Pain Point 2: Stray capacitance spends the allowance

Every pico-farad from a switching node to earth draws on the same allowance. A 400 V bus routed close to a chassis panel can add 200 pF, which is 14 µA of touch current at 50 Hz.

The machine then fails the measurement with no Y capacitor installed at all, and the fix belongs in the layout, not in the filter.

Pain Point 3: Safety-class substitution in the field

A Y2 part fitted where Y1 is required, or an uncertified part in the X position, voids the certification and removes the fail-open guarantee.

The machine keeps running until a mains transient breaks the capacitor and the chassis becomes live, which is the event the class system exists to prevent.

Pain Point 4: Insulation aging past the envelope

Creepage and clearance margins measured at certification degrade under UV, ozone and contamination. Surfaces that passed at the factory carry a rising leakage current as the years pass.

A machine that is never re-tested then operates outside its certified envelope, and the first symptom is a residual current device tripping on a humid morning.

4. 設計手順

Strategy 1: Build the leakage sum as a spreadsheet

List every Y capacitor, every stray estimate and the applicable limit, and design the filter so the total stays below 70% of the limit.

On a 250 µA portable allowance that means 175 µA, which leaves 75 µA for aging drift and component spread.

Strategy 2: Spend the choke before the Y capacitors

Raise the common-mode inductance and add a shield between the switching node and earth. Every decibel of suppression gained that way leaves the leakage allowance untouched.

This is the step that breaks the deadlock in Pain Point 1, and it costs board area instead of certification margin.

Strategy 3: Specify certified safety capacitors only

　 safety-certified X and Y capacitors with the applicable marks, and lock the part numbers in the bill of materials with photographed assembly instructions.

Where a self-healing construction is acceptable, a フィルムコンデンサ in the X position fails open under a mains transient, which is the behaviour the class system expects.

Strategy 4: Hold the Y value stable over temperature

選択する クラスI誘電体 with a temperature coefficient of ±30 ppm/°C for the Y positions. The capacitance then stays put, and the leakage current measured at 25 °C is the leakage current at 0 °C and at 50 °C.

A Class II part with a wide temperature coefficient moves the same allowance by tens of percent across the cabinet range, which is how a machine that passed in the laboratory fails in the field.

Strategy 5: Coordinate the residual current device

Set the residual current device so normal leakage at 70% of the limit never trips it, and a genuine insulation fault is cleared within 100 ms.

Time discrimination between the machine-level device and the upstream device prevents a single fault from taking down the whole line.

Strategy 6: Re-certify on a schedule

Measure touch current, insulation resistance and partial discharge every year and after every high-voltage repair.

The three-year trend is the evidence that justifies re-coating a creepage path or replacing a part before an incident. Without the trend, the first data point arrives with the accident.

コンポーネントパラメータ	標準値	試験条件
定格電圧（HVCT8Gシリーズ）	10kV DC	60秒間、1.5倍の高電圧試験
キャパシタンス	4700 pF ±20% (472M)	1 MHz、1 V rms
1MHzにおけるESR	50 mΩ未満	tanδ 0.1%以下
ループインダクタンス（E40コード）	8 nH未満	端子間隔40mm
絶縁抵抗	500V DCで10GΩ以上	25℃、相対湿度60％
使用可能温度範囲	−40℃～+125℃	IEC 60068-2シリーズ
パルスdv/dt機能	50 kV/µs以上	定格電圧で

5. HVC N4700 capacitors for safety-critical nodes

Three requirements drive the choice at this node: capacitance that does not drift with temperature, a documented failure mode, and test records that support the certification file. HVC builds Class I parts for that set, from a 6,000 m² owned factory in Dongguan, across 1 kV to 100 kV.

ここで重要な6つのパラメータ

• N4700 Class I dielectric with ±30 ppm/°C keeps Y capacitance and touch current constant over temperature, so an allowance certified at 25 °C holds at 0 °C and at 50 °C.
• Partial discharge below 5 pC at 1.2× rated voltage is guaranteed per part, so a high-voltage capacitor does not erode into an unexpected short inside its design life.
• Safety-classified X and Y versions are supplied with the applicable marks for the mains filter, alongside the general-purpose 1–100 kV family for the lamp stage.
• tanδ below 0.1% at 1 kHz keeps filter and safety parts cool, so the leakage they produce does not drift with self-heating.
• Every lot ships with capacitance, tanδ, PD and insulation-resistance records, which is the documentation a certification body asks to see.
• HVC's 40 kV / 441 screw-type capacitor replaced a first-tier international brand in field-service programmes where leakage is audited to the microampere. ドアノブコンデンサ ディスクは、 ビシェイ そしてTDKの高電圧シリーズ。

配送とサポート

Standard parts ship in 4–8 weeks, and certified safety-class sets in 6–10 weeks. HVC applications engineering reviews the leakage sum, the stray estimate and the class selection against your mains configuration.

Send the mains configuration, the leakage allowance, the filter topology and the high-voltage stages. HVC returns an X and Y selection with leakage calculations, PD test reports and the documentation pack for the certification file, with samples in two weeks.

6。 よくある質問

Q1: How much leakage does one nano-farad of Y capacitance add?

From I_Y = 2πfC_YV_LN, one nano-farad at 230 V gives 72 µA at 50 Hz and 87 µA at 60 Hz. A 250 µA portable limit therefore holds about 3.4 nF at 50 Hz before any stray term is counted.

Q2: Why hold the design to 70% of the limit?

Because aging, temperature and component spread all push the sum upward after certification. A 175 µA design allowance against a 250 µA limit leaves 75 µA for that drift, and it keeps the machine compliant after three years of UV and ozone exposure.

Q3: Which class belongs in which position?

Y1 with its 8 kV impulse rating goes in any line-to-earth position where a failure would put the operator at risk. Y2 at 5 kV covers lower-risk line-to-earth nodes. X1 and X2 sit between the phases. The mark on the body is the only evidence a certification body accepts.

Q4：どのくらいの浮遊容量が多すぎると言えるのでしょうか？

Compare it against the allowance. A 200 pF path to earth is 14 µA at 50 Hz, which is 8% of a 175 µA allowance. It also drives 0.4 A of displacement current from a 400 V bus switched in 200 ns, so the routing matters for emissions as well as for leakage.

Q5: What does partial discharge have to do with safety?

Erosion is a failure mechanism. A part held below 5 pC at 1.2× rated voltage does not degrade into an unexpected short inside its design life, which keeps the fail-open requirement true for the whole service interval and not only at the factory test.

Q6: How often should the machine be re-tested?

Annually, and after every high-voltage repair. Measure touch current, insulation resistance and partial discharge, and trend the three values. The trend tells you when to clean a creepage path or replace a capacitor, before a residual current device trip forces the decision.

7。 リファレンス

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9. 未来を支える電力：高電圧MLCCが現代の電子機器の効率性をどのように向上させるか、村田製作所、https://www.murata.com/en-eu/s/blog/powering-the-future-how-high-voltage-mlccs-drive-efficiency-in-modern-electronics.html 。
10. セラミックコンデンサーの利用 3 kV (C0G/NP0 vs X7R/Y5S の安定性に関する議論)、Forum Retrotechnique、https://forum.retrotechnique.org/t/utilisation-des-condensateurs-ceramiques-3kv/115858 。
11. HVCアプリケーションエンジニアリングチーム、 高電圧セラミックコンデンサ 技術リソース、https://www.hv-caps.com